T5383

Parallel Test for Up to 384 Devices.

Flexible Pin Configuration Drives Lower Cost of Test.

In the DRAM manufacturing process, shrinking geometries

for 300 mm wafers are taking device densities and speeds to

a new level. At the same time, proliferating cellular tele

phones, personal computers,various digital appliances, are

propelling demand for memory, particularly multilayer SIP

(System-in-Package) devices. The T5383 provides a timely

response to these trends. From front-end test for DRAM to

back-end test for FLASH memory, MCP/SIP, and other devices,

the T5383 provides a high-throughput solution that offers flexible

support for increasingly fast and versatile memory devices.

In addition, T5383 high-density pin electronics deliver 50% more

capacity than provided by its prede cessor, T5377S, and within

the same small footprint.

Compatible with previous products

The T5383 uses FutureSuite, with its multi-language support, as its OS.

FutureSuite® is compatible with the ATL language, supporting thou

sands of applications, and also allows programming in ADVANTEST’s

C-based MCI (Multi Control Interface). These capabilities enable the

user to make selections tailored to evolving programming needs while

leveraging existing implementations.